AMS Models of Computation
Overview of SystemC AMS Models of Computation: Timed Data Flow (TDF), Linear Signal Flow (LSF), and Electrical Linear Networks (ELN).
SystemC AMS Models of Computation
The SystemC Analog/Mixed-Signal (AMS) 2.0 LRM defines three primary Models of Computation (MoC). These MoCs dictate how the mathematical solver evaluates analog equations alongside the standard discrete-event (DE) SystemC scheduler.
The Three MoCs
- Timed Data Flow (TDF): The foundational and fastest MoC. It uses a static, pre-calculated schedule with fixed time steps. TDF modules execute synchronously, making them ideal for DSP algorithms, RF transceivers, and behavioral signal processing.
- Linear Signal Flow (LSF): Models continuous-time equations using primitive building blocks (integrators, differentiators, adders, multipliers). The AMS solver translates these into systems of linear differential equations.
- Electrical Linear Networks (ELN): Models pure electrical circuits using physical passive components (resistors, capacitors, inductors) and voltage/current sources. Solved via nodal analysis matrices.
End-to-End TDF Example
Because TDF is the most heavily utilized MoC for architectural modeling, this example demonstrates a TDF module generating a sine wave, conforming strictly to the AMS LRM.
#include <systemc>
#include <systemc-ams.h>
// A TDF Module representing a continuous-time signal generator
SCA_TDF_MODULE(TDF_Sine_Source) {
// TDF output port
sca_tdf::sca_out<double> out_port;
double amplitude;
double frequency;
SCA_CTOR(TDF_Sine_Source) : out_port("out_port"), amplitude(5.0), frequency(1000.0) {}
// LRM Phase: set_attributes
// This is called once before simulation. TDF modules MUST define their timestep.
void set_attributes() {
set_timestep(10, sc_core::SC_US); // 10 microsecond discrete evaluation steps
}
// LRM Phase: processing
// Called repeatedly at every timestep by the AMS static scheduler
void processing() {
double t = get_time().to_seconds();
double val = amplitude * std::sin(2.0 * M_PI * frequency * t);
out_port.write(val);
// Console output to prove execution
if (t < 0.0001) {
std::cout << "@" << sc_core::sc_time_stamp()
<< " [TDF Source] Generating Sine val: " << val << std::endl;
}
}
};
// TDF Sink to consume the signal
SCA_TDF_MODULE(TDF_Sink) {
sca_tdf::sca_in<double> in_port;
SCA_CTOR(TDF_Sink) : in_port("in_port") {}
void set_attributes() {
// Inherits timestep from the connected port if not explicitly set
}
void processing() {
double val = in_port.read();
// Silently consume...
}
};
int sc_main(int argc, char* argv[]) {
// TDF continuous-time signal wire
sca_tdf::sca_signal<double> analog_wire("analog_wire");
TDF_Sine_Source source("source");
TDF_Sink sink("sink");
source.out_port(analog_wire);
sink.in_port(analog_wire);
std::cout << "Starting AMS TDF Simulation..." << std::endl;
sc_core::sc_start(1, sc_core::SC_MS);
return 0;
}Mixing MoCs
SystemC AMS allows models to interconnect seamlessly. An ELN resistor network can output an analog voltage, which is sampled by a TDF ADC model, which then outputs a discrete integer to the SystemC DE kernel over a standard TLM socket. The AMS LRM handles the complex synchronization between the continuous-time linear solvers and the discrete-event delta-cycle scheduler automatically.
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