Modern SystemC tutorial site
Learn SystemC from model syntax to simulation-kernel source.
A LearnCpp-style course for hardware architects, verification engineers, embedded developers, and curious C++ programmers who want to understand not only what to write, but why SystemC behaves the way it does.
SC_MODULE(Counter) {
sc_in<bool> clk;
sc_out<unsigned> count;
void tick() {
count.write(count.read() + 1);
}
SC_CTOR(Counter) {
SC_METHOD(tick);
sensitive << clk.pos();
}
};Curriculum
Follow a path like LearnCpp, but focused on SystemC.
Start Here
3 focused lessons
Chapter 1Foundations
2 focused lessons
Chapter 2Core Modeling
5 focused lessons
Chapter 3Communication
3 focused lessons
Chapter 4TLM and Platforms
6 focused lessons
Chapter 5Source Internals
8 focused lessons
Chapter 6Practice
3 focused lessons
Chapter 7SystemC 1666-2023 LRM
11 focused lessons
Chapter 8SystemC AMS
13 focused lessons
Chapter 9SystemC CCI
13 focused lessons
Chapter 10UVM-SystemC
13 focused lessons
Chapter 11Advanced Core Semantics
11 focused lessons
Chapter 12Virtual Platform Construction
12 focused lessons
Chapter 13Modeling Best Practices
7 focused lessons
Chapter 14Chapter 14
5 focused lessons
Deep source literacy
Read the library as a design document.
SystemC is C++, but the library builds a hardware-like world through registration macros, channels, interfaces, deferred updates, event queues, and coroutine-style process control. The source lessons explain those moving parts in plain language.
- sc_simcontext and the scheduler
- sc_module construction and hierarchy
- sc_signal update requests
- sc_port, sc_export, and interface binding
- tlm_generic_payload and socket utilities
- wait(), events, delta cycles, and time